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APT8M80K 800V, 8A, 1.35 MAX, N-Channel MOSFET Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. D APT8M80K Single die MOSFET G S FEATURES * Fast switching with low EMI/RFI * Low RDS(on) * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant TYPICAL APPLICATIONS * PFC and other boost converter * Buck converter * Two switch forward (asymmetrical bridge) * Single switch forward * Flyback * Inverters Absolute Maximum Ratings Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive 1 Ratings 8 5 25 30 285 4 Unit A V mJ A Thermal and Mechanical Characteristics Symbol PD RJC RCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) 0.07 Package Weight 1.2 10 Torque Mounting Torque ( TO-220 Package), 4-40 or M3 screw 1.1 MicrosemiWebsite-http://www.microsemi.com N*m -55 0.11 150 C 300 oz g in*lbf 04-2009 050-8113 Rev B Min Typ Max 225 0.56 Unit W C/W Static Characteristics Symbol VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS TJ = 25C unless otherwise specified Test Conditions VGS = 0V, ID = 250A Reference to 25C, ID = 250A VGS = 10V, ID = 4A VGS = VDS, ID = 0.5mA VDS = 800V VGS = 0V TJ = 25C TJ = 125C APT8M80K Typ 0.87 1.06 4 -10 Max Unit V V/C V mV/C A nA Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance 3 Min 800 Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current 3 1.35 5 100 500 100 VGS = 30V Dynamic Characteristics Symbol gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf 4 TJ = 25C unless otherwise specified Test Conditions VDS = 50V, ID = 4A VGS = 0V, VDS = 25V f = 1MHz Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related Min Typ 6 1335 23 135 65 Max Unit S pF VGS = 0V, VDS = 0V to 533V 5 Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time VGS = 0 to 10V, ID = 4A, VDS = 400V Resistive Switching VDD = 533V, ID = 4A RG = 10 6 , VGG = 15V 31 43 7 22 8 11 33 10 nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD trr Qrr dv/dt Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min D Typ Max 8 Unit G S A 25 1.3 825 3 10 V ns C V/ns ISD = 4A, TJ = 25C, VGS = 0V ISD = 4A, VDD = 100V 3 diSD/dt = 100A/s, TJ = 25C ISD 4A, di/dt 1000A/s, VDD = 533V, TJ = 125C 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25C, L = 35.63mH, RG = 25, IAS = 4A. 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = 4.24E-9/VDS^2 + 5.44E-9/VDS + 2.10E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. Rev B 050-8113 04-2009 APT8M80K 16 V GS 8 = 10V T = 125C J V V 14 TJ = -55C 7 GS GS = 10, & 15V = 6, & 6.5V 5.5V ID, DRAIN CURRENT (A) 12 TJ = 25C ID, DRIAN CURRENT (A) 6 5 4 3 2 1 10 8 6 4 TJ = 125C 5V 2 TJ = 150C 4.5V 4V 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics 0 0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 3.0 NORMALIZED TO VGS = 10V @ 4A 25 VDS> ID(ON) x RDS(ON) MAX. 250SEC. PULSE TEST @ <0.5 % DUTY CYCLE 2.5 ID, DRAIN CURRENT (A) 20 2.0 15 TJ = -55C 1.5 10 TJ = 25C 1.0 0.5 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 10 TJ = -55C 5 TJ = 125C 0 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 2,000 1,000 Ciss gfs, TRANSCONDUCTANCE 8 TJ = 125C C, CAPACITANCE (pF) TJ = 25C 6 100 Coss 10 4 Crss 2 0 0 2 3 4 5 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current ID = 4A 1 6 100 200 300 400 500 600 700 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 25 ISD, REVERSE DRAIN CURRENT (A) 1 0 16 VGS, GATE-TO-SOURCE VOLTAGE (V) 14 12 20 VDS = 160V 10 VDS = 400V 15 TJ = 25C TJ = 150C 8 6 VDS = 640V 10 4 2 10 20 30 40 50 60 70 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0 0 5 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 0 050-8113 Rev B 04-2009 APT8M80K 50 50 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 IDM 10 IDM Rds(on) 13s 100s 13s 100s 1 Rds(on) 1ms 10ms 100ms 1 TJ = 150C TC = 25C 1ms 10ms 100ms DC line 0.1 TJ = 125C TC = 75C DC line Scaling for Different Case & Junction Temperatures: ID = ID(T = 25C)*(TJ - TC)/125 1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 0.1 C 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 1 0.60 D = 0.9 ZJC, THERMAL IMPEDANCE (C/W) 0.50 0.40 0.7 0.30 0.5 Note: PDM t1 t2 0.20 0.3 SINGLE PULSE 0.1 0.05 t1 = Pulse Duration Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC t 0.10 0 10 -5 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 10-4 1.0 TO-220 (K) Package Outline e3 100% Sn Plated Drain 04-2009 Gate Drain Source 050-8113 Rev B Dimensions in Inches and (Millimeters) Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved. |
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